{"id":49082,"date":"2026-10-19T06:00:13","date_gmt":"2026-10-19T04:00:13","guid":{"rendered":"https:\/\/nexuswelt.com\/?p=49082"},"modified":"2026-10-09T23:11:31","modified_gmt":"2026-10-09T21:11:31","slug":"eu-funding-semiconductor-startups-chips-ju","status":"publish","type":"post","link":"https:\/\/nexuswelt.com\/de\/eu-funding-semiconductor-startups-chips-ju\/","title":{"rendered":"EU Funding for Semiconductor Startups: Chips JU Explained"},"content":{"rendered":"\t\t<div data-elementor-type=\"wp-post\" data-elementor-id=\"49082\" class=\"elementor elementor-49082\" data-elementor-post-type=\"post\">\n\t\t\t\t<div class=\"elementor-element elementor-element-27f0d414 e-flex e-con-boxed e-con e-parent\" data-id=\"27f0d414\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t\t\t<div class=\"elementor-element elementor-element-4762e8f elementor-widget elementor-widget-text-editor\" data-id=\"4762e8f\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t\t\t\t\t\t<p><span style=\"color: #595959;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Munich, 19 October 2026 \u00b7 Nexuswelt Group<\/span><\/span><\/span><\/p><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Most startups assume the Chips Joint Undertaking is about fabrication plants and therefore not for them. That assumption is wrong twice over: it misses the collaborative research calls, and &#8211; more importantly &#8211; it misses the fact that much of what the Chips JU funds is infrastructure you can use without winning anything at all.<\/span><\/span><\/p><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">This guide covers how the programme is structured, the design platform and competence centre network a startup can access directly, the national co-funding rule that catches applicants out, and where a small company realistically fits. For the broader starting point, see our guide to <a href=\"https:\/\/nexuswelt.com\/eu-funding-for-startups-where-to-start\/\">EU funding for startups<\/a>.<\/span><\/span><\/p><h2 class=\"western\"><span style=\"color: #1f3864;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: medium;\"><b>Two pillars, funded from two programmes<\/b><\/span><\/span><\/span><\/h2><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">The <\/span><\/span><a href=\"https:\/\/www.chips-ju.europa.eu\/Open-and-Upcoming-Calls\/\"><span style=\"color: #0563c1;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><u>Chips Joint Undertaking<\/u><\/span><\/span><\/span><\/a><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"> manages two streams of investment, drawing on both Horizon Europe and <a href=\"https:\/\/nexuswelt.com\/digital-europe-ai-factories-data-spaces-manufacturing\/\">Digital Europe.<\/a><\/span><\/span><\/p><table width=\"624\" cellspacing=\"0\" cellpadding=\"6\"><thead><tr valign=\"top\"><td bgcolor=\"#1f3864\" width=\"160\"><span style=\"color: #ffffff;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>Pillar<\/b><\/span><\/span><\/span><\/td><td bgcolor=\"#1f3864\" width=\"438\"><span style=\"color: #ffffff;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>What it funds<\/b><\/span><\/span><\/span><\/td><\/tr><\/thead><tbody><tr valign=\"top\"><td width=\"160\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>Chips for Europe Initiative<\/b><\/span><\/span><\/td><td width=\"438\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Strategic infrastructure that bridges research and industrial deployment: pilot lines, a cloud-based design platform, a network of competence centres, and dedicated quantum actions<\/span><\/span><\/td><\/tr><tr valign=\"top\"><td bgcolor=\"#f2f5fa\" width=\"160\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>Electronics Components and Systems Research and Innovation (ECS R&amp;I)<\/b><\/span><\/span><\/td><td bgcolor=\"#f2f5fa\" width=\"438\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Collaborative projects across a broad range of technology domains, through Research and Innovation Actions and Innovation Actions, with a Global strand opening topics to international cooperation<\/span><\/span><\/td><\/tr><\/tbody><\/table><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><i>The distinction matters for a startup. The first pillar largely builds things you can use. The second is where you apply for project funding in a consortium.<\/i><\/span><\/span><\/p><figure id=\"attachment_49087\" aria-describedby=\"caption-attachment-49087\" style=\"width: 640px\" class=\"wp-caption alignnone\"><img fetchpriority=\"high\" decoding=\"async\" class=\"wp-image-49087 size-large\" title=\"The Chips JU Ecosystem for Startups\" src=\"https:\/\/nexuswelt.com\/wp-content\/uploads\/2026\/10\/chips_ju_startup_ecosystem_infographic1-1024x683.jpg\" alt=\"Chips JU ecosystem for semiconductor startups, from design platform and competence centres to collaborative calls and national co-funding\" width=\"640\" height=\"427\" srcset=\"https:\/\/nexuswelt.com\/wp-content\/uploads\/2026\/10\/chips_ju_startup_ecosystem_infographic1-1024x683.jpg 1024w, https:\/\/nexuswelt.com\/wp-content\/uploads\/2026\/10\/chips_ju_startup_ecosystem_infographic1-300x200.jpg 300w, https:\/\/nexuswelt.com\/wp-content\/uploads\/2026\/10\/chips_ju_startup_ecosystem_infographic1-768x512.jpg 768w, https:\/\/nexuswelt.com\/wp-content\/uploads\/2026\/10\/chips_ju_startup_ecosystem_infographic1.jpg 1536w\" sizes=\"(max-width: 640px) 100vw, 640px\" \/><figcaption id=\"caption-attachment-49087\" class=\"wp-caption-text\">The Chips JU startup pathway: access the EU Chips Design Platform, competence centres and pilot lines, then move into collaborative R&amp;I calls with national co-funding.<\/figcaption><\/figure><h2 class=\"western\"><span style=\"color: #1f3864;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: medium;\"><b>The part most startups miss: infrastructure you can use<\/b><\/span><\/span><\/span><\/h2><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Three assets exist specifically to lower the barrier for small companies, and using them does not require winning a call.<\/span><\/span><\/p><h3 class=\"western\"><span style=\"color: #2e5496;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: medium;\"><b>The EU Chips Design Platform<\/b><\/span><\/span><\/span><\/h3><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">A pan-European, cloud-based design infrastructure coordinated by imec and implemented by a consortium of European research and technology organisations. It gives SMEs, startups and fabless companies access to commercial electronic design automation tools, IP libraries, cloud-based design environments, and a route through to European pilot lines and manufacturing.<\/span><\/span><\/p><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">For a fabless startup, subsidised access to EDA tools and IP libraries removes one of the largest fixed costs in chip design. First companies are being onboarded across 2026 to 2028.<\/span><\/span><\/p><h3 class=\"western\"><span style=\"color: #2e5496;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: medium;\"><b>Chips Competence Centres<\/b><\/span><\/span><\/span><\/h3><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">A structured network of thirty national centres established across all twenty-seven EU Member States plus Norway as of February 2026. They operate on an open and non-discriminatory basis and act as the first contact point for SMEs and startups.<\/span><\/span><\/p><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">What they provide: access to pilot lines and the European design platform, technical expertise and design support, skills development and training, help finding investors, and connections across the European network. Participating states define their own technological priorities, so the centre in your country is likely to be aligned with national industrial strengths.<\/span><\/span><\/p><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">This is the single most useful first step for a semiconductor startup in Europe, and it costs a conversation.<\/span><\/span><\/p><h3 class=\"western\"><span style=\"color: #2e5496;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: medium;\"><b>Pilot lines<\/b><\/span><\/span><\/span><\/h3><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Shared advanced-manufacturing facilities where companies can prototype chips they could not build alone &#8211; including lines for photonic integrated circuits and wide band gap technologies. Access is typically arranged through the competence centre network or through participation in a funded project.<\/span><\/span><\/p><h2 class=\"western\"><span style=\"color: #1f3864;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: medium;\"><b>The national co-funding rule<\/b><\/span><\/span><\/span><\/h2><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">This is the structural feature that surprises applicants, and it does not work like Horizon Europe. For the standard Horizon Europe baseline, see our guide to <a href=\"https:\/\/nexuswelt.com\/horizon-europe-budget-cost-categories-rates\/\">funding rates and co-financing<\/a>.<\/span><\/span><\/p><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Most Chips JU calls are co-funded: the Joint Undertaking contributes a share and the participating state contributes the rest. The JU contribution is up to 50% for co-funded calls, with the coordination action for competence centres being an exception funded entirely through Digital Europe.<\/span><\/span><\/p><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Two consequences follow, and both need attention before you invest in a proposal:<\/span><\/span><\/p><ul><li value=\"1\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Your national funding body&#8217;s rules apply alongside the JU&#8217;s. Eligibility, funding rates and reporting requirements are partly set nationally, and they differ between participating states.<\/span><\/span><\/li><li><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">You must engage your national authority early. A proposal that succeeds at JU level but has no national funding commitment behind it does not proceed. This is not a formality to complete afterwards.<\/span><\/span><\/li><\/ul><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><i>The practical instruction: contact your national funding body and your Chips Competence Centre before writing anything. In some participating states the national process has its own deadlines that precede the JU cut-off.<\/i><\/span><\/span><\/p><h2 class=\"western\"><span style=\"color: #1f3864;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: medium;\"><b>How the calls are structured<\/b><\/span><\/span><\/span><\/h2><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">The ECS R&amp;I stream runs annual collaborative calls spanning low to high technology readiness. Recent cycles have opened in early July with cut-offs clustered in September, covering areas such as power electronics, photonics, health electronics, quantum chip design, quantum enabling technologies, skills, and pilot line federation.<\/span><\/span><\/p><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Two features worth knowing:<\/span><\/span><\/p><ul><li><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Research and Innovation Actions fund lower-maturity work, including bottom-up calls at roughly TRL 3\u20134 aimed at establishing new knowledge and technical feasibility. Innovation Actions fund market-oriented development at roughly TRL 5\u20138, with a deployment plan for Europe.<\/span><\/span><\/li><li><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">The Global strand, which opens topics to international cooperation, runs in two phases: a short project outline first, and a full proposal only if the outline succeeds. This is the same logic as a two-stage Horizon Europe call and it substantially lowers the cost of attempting.<\/span><\/span><\/li><\/ul><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Call dates and budgets change each cycle. Verify current opportunities on the Chips JU portal rather than relying on any secondary summary, including this one.<\/span><\/span><\/p><h2 class=\"western\"><span style=\"color: #1f3864;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: medium;\"><b>Where a startup actually fits<\/b><\/span><\/span><\/span><\/h2><table width=\"624\" cellspacing=\"0\" cellpadding=\"6\"><thead><tr valign=\"top\"><td bgcolor=\"#1f3864\" width=\"187\"><span style=\"color: #ffffff;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>Your position<\/b><\/span><\/span><\/span><\/td><td bgcolor=\"#1f3864\" width=\"411\"><span style=\"color: #ffffff;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>The realistic route<\/b><\/span><\/span><\/span><\/td><\/tr><\/thead><tbody><tr valign=\"top\"><td width=\"187\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>Fabless design, need tool and IP access<\/b><\/span><\/span><\/td><td width=\"411\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">The EU Chips Design Platform, and your national competence centre as the entry point<\/span><\/span><\/td><\/tr><tr valign=\"top\"><td bgcolor=\"#f2f5fa\" width=\"187\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>Early-stage concept, TRL 3\u20134<\/b><\/span><\/span><\/td><td bgcolor=\"#f2f5fa\" width=\"411\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Bottom-up Research and Innovation Action topics, as a partner in a consortium<\/span><\/span><\/td><\/tr><tr valign=\"top\"><td width=\"187\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>Working technology, TRL 5\u20138, deployment ambition in Europe<\/b><\/span><\/span><\/td><td width=\"411\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Innovation Action topics, where industrial relevance rather than novelty is the scoring emphasis<\/span><\/span><\/td><\/tr><tr valign=\"top\"><td bgcolor=\"#f2f5fa\" width=\"187\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>Edge AI, accelerators, hardware-aware optimisation<\/b><\/span><\/span><\/td><td bgcolor=\"#f2f5fa\" width=\"411\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">ECS R&amp;I topics &#8211; often a better match than a Horizon Europe Cluster 4 AI topic, with less competition<\/span><\/span><\/td><\/tr><tr valign=\"top\"><td width=\"187\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>Need prototyping capacity you cannot afford<\/b><\/span><\/span><\/td><td width=\"411\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Pilot line access, arranged through the competence centre network<\/span><\/span><\/td><\/tr><tr valign=\"top\"><td bgcolor=\"#f2f5fa\" width=\"187\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>No consortium and no network in this field<\/b><\/span><\/span><\/td><td bgcolor=\"#f2f5fa\" width=\"411\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Competence centre first, then the industry associations &#8211; this is where consortia form<\/span><\/span><\/td><\/tr><tr valign=\"top\"><td width=\"187\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><b>Non-EU but associated country<\/b><\/span><\/span><\/td><td width=\"411\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Check the topic conditions and the national co-funding position, which is where the complication usually sits<\/span><\/span><\/td><\/tr><\/tbody><\/table><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">For a broader comparison of the available routes, see our guide to comparing <a href=\"https:\/\/nexuswelt.com\/eu-ai-funding-for-startups\/\">AI funding programmes.<\/a><\/span><\/span><\/p><h2 class=\"western\"><span style=\"color: #1f3864;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: medium;\"><b>How consortia form in this ecosystem<\/b><\/span><\/span><\/span><\/h2><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">This is the part that differs most from the rest of European funding, and it is why an outsider can find the Chips JU opaque.<\/span><\/span><\/p><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Three industry associations partner in the Chips Joint Undertaking alongside the European Commission and the participating states: AENEAS, EPoSS and INSIDE. They represent research, development and innovation actors across the electronic components and systems value chain, from large industry and SMEs to research organisations and universities, and they contribute to defining strategic priorities and shaping the work programme.<\/span><\/span><\/p><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Consortium formation runs heavily through these associations and their working groups rather than through open partner-search platforms. For a startup, that means membership and participation in the relevant association is not a networking nicety &#8211; it is the primary access route to the consortia that will submit. Compared with the cost of an unsuccessful proposal, it usually pays for itself.<\/span><\/span><\/p><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><i>Nexuswelt is a member of the <a href=\"https:\/\/nexuswelt.com\/nexuswelt-becomes-a-member-of-the-inside-industry-association-strengthening-the-european-ecosystem-for-digital-innovation\/\">INSIDE Industry Association<\/a>, which is one reason this cluster is covered here in more depth than a general funding consultancy would.<\/i><\/span><\/span><\/p><h2 class=\"western\"><span style=\"color: #1f3864;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: medium;\"><b>Practical steps<\/b><\/span><\/span><\/span><\/h2><ol><li value=\"1\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Contact your national Chips Competence Centre. It is the designated first contact point for startups, the conversation is free, and it will tell you what your national participating state supports.<\/span><\/span><\/li><li><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Establish your national co-funding position early, including any national deadlines that precede the JU cut-off.<\/span><\/span><\/li><li><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Investigate design platform access if you are fabless. Subsidised EDA and IP access changes the economics of early design work.<\/span><\/span><\/li><li><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><a href=\"https:\/\/nexuswelt.com\/technology-readiness-levels-trl-1-9\/\">Establish your TRL<\/a> honestly, since it determines whether you belong in a Research and Innovation Action or an Innovation Action.<\/span><\/span><\/li><li><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Join or engage with the relevant industry association and its working groups, where consortia actually form.<\/span><\/span><\/li><li><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Register and obtain a Participant Identification Code, independently of any specific call.<\/span><\/span><\/li><li><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Use the Global strand&#8217;s outline phase to test an idea cheaply where international cooperation fits your case.<\/span><\/span><\/li><li><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Start as a partner. Coordination in this ecosystem is generally led by established industrial players and research organisations.<\/span><\/span><\/li><\/ol><h2 class=\"western\"><span style=\"color: #1f3864;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: medium;\"><b>How Nexuswelt works with semiconductor companies<\/b><\/span><\/span><\/span><\/h2><p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Nexuswelt is a member of the INSIDE Industry Association and works with deep-tech companies on programme selection, consortium positioning and the impact and exploitation logic these projects are judged on, contributing to funded projects as a partner for communication, dissemination, stakeholder engagement and exploitation. The wider policy context is in our guide to <\/span><\/span><a href=\"https:\/\/nexuswelt.com\/european-technology-sovereignty-deep-tech-eu-funding\/\"><span style=\"color: #0563c1;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><u>European technology sovereignty<\/u><\/span><\/span><\/span><\/a><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">, and more on the firm is on the <\/span><\/span><a href=\"https:\/\/nexuswelt.com\/about-us\/\"><span style=\"color: #0563c1;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><u>Nexuswelt about page<\/u><\/span><\/span><\/span><\/a><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">. For companies still choosing between programmes, start with an<a href=\"https:\/\/nexuswelt.com\/eu-funding-entry-readiness\/\"> EU funding options assessment<\/a>.<\/span><\/span><\/p><h2 class=\"western\"><span style=\"color: #1f3864;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: medium;\"><b>Frequently asked questions<\/b><\/span><\/span><\/span><\/h2>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t<div class=\"elementor-element elementor-element-534c02e6 e-flex e-con-boxed e-con e-parent\" data-id=\"534c02e6\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t\t\t<div class=\"elementor-element elementor-element-5a3386bf elementor-widget elementor-widget-n-accordion\" data-id=\"5a3386bf\" data-element_type=\"widget\" data-e-type=\"widget\" data-settings=\"{&quot;default_state&quot;:&quot;all_collapsed&quot;,&quot;max_items_expended&quot;:&quot;one&quot;,&quot;n_accordion_animation_duration&quot;:{&quot;unit&quot;:&quot;ms&quot;,&quot;size&quot;:400,&quot;sizes&quot;:[]}}\" data-widget_type=\"nested-accordion.default\">\n\t\t\t\t\t\t\t<div class=\"e-n-accordion\" aria-label=\"Accordion. Open links with Enter or Space, close with Escape, and navigate with Arrow Keys\">\n\t\t\t\t\t\t<details id=\"e-n-accordion-item-1510\" class=\"e-n-accordion-item\" >\n\t\t\t\t<summary class=\"e-n-accordion-item-title\" data-accordion-index=\"1\" tabindex=\"0\" aria-expanded=\"false\" aria-controls=\"e-n-accordion-item-1510\" >\n\t\t\t\t\t<span class='e-n-accordion-item-title-header'><h3 class=\"e-n-accordion-item-title-text\"> What is the Chips Joint Undertaking? <\/h3><\/span>\n\t\t\t\t\t\t\t<span class='e-n-accordion-item-title-icon'>\n\t\t\t<span class='e-opened' ><i aria-hidden=\"true\" class=\"fas fa-minus\"><\/i><\/span>\n\t\t\t<span class='e-closed'><i aria-hidden=\"true\" class=\"fas fa-plus\"><\/i><\/span>\n\t\t<\/span>\n\n\t\t\t\t\t\t<\/summary>\n\t\t\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1510\" class=\"elementor-element elementor-element-79764bac e-con-full e-flex e-con e-child\" data-id=\"79764bac\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1510\" class=\"elementor-element elementor-element-289f8f92 e-flex e-con-boxed e-con e-child\" data-id=\"289f8f92\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t\t\t<div class=\"elementor-element elementor-element-59da93be elementor-widget elementor-widget-text-editor\" data-id=\"59da93be\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t\t\t\t\t\t<p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">A European partnership that funds the semiconductor value chain from research through to manufacturing, drawing on both Horizon Europe and Digital Europe. It manages two pillars: the Chips for Europe Initiative, which funds pilot lines, a design platform, competence centres and quantum actions; and Electronics Components and Systems Research and Innovation, which funds collaborative projects.<\/span><\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/details>\n\t\t\t\t\t\t<details id=\"e-n-accordion-item-1511\" class=\"e-n-accordion-item\" >\n\t\t\t\t<summary class=\"e-n-accordion-item-title\" data-accordion-index=\"2\" tabindex=\"-1\" aria-expanded=\"false\" aria-controls=\"e-n-accordion-item-1511\" >\n\t\t\t\t\t<span class='e-n-accordion-item-title-header'><h3 class=\"e-n-accordion-item-title-text\"> Is the Chips JU only for large companies and fabs? <\/h3><\/span>\n\t\t\t\t\t\t\t<span class='e-n-accordion-item-title-icon'>\n\t\t\t<span class='e-opened' ><i aria-hidden=\"true\" class=\"fas fa-minus\"><\/i><\/span>\n\t\t\t<span class='e-closed'><i aria-hidden=\"true\" class=\"fas fa-plus\"><\/i><\/span>\n\t\t<\/span>\n\n\t\t\t\t\t\t<\/summary>\n\t\t\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1511\" class=\"elementor-element elementor-element-19c3238b e-con-full e-flex e-con e-child\" data-id=\"19c3238b\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1511\" class=\"elementor-element elementor-element-557125e3 e-flex e-con-boxed e-con e-child\" data-id=\"557125e3\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t\t\t<div class=\"elementor-element elementor-element-49456610 elementor-widget elementor-widget-text-editor\" data-id=\"49456610\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t\t\t\t\t\t<p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">No. Much of what it funds is infrastructure built specifically to lower barriers for SMEs and startups, including a cloud-based design platform giving fabless companies access to commercial EDA tools and IP libraries, and a network of thirty national competence centres that act as first contact points for small companies.<\/span><\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/details>\n\t\t\t\t\t\t<details id=\"e-n-accordion-item-1512\" class=\"e-n-accordion-item\" >\n\t\t\t\t<summary class=\"e-n-accordion-item-title\" data-accordion-index=\"3\" tabindex=\"-1\" aria-expanded=\"false\" aria-controls=\"e-n-accordion-item-1512\" >\n\t\t\t\t\t<span class='e-n-accordion-item-title-header'><h3 class=\"e-n-accordion-item-title-text\"> What is the EU Chips Design Platform? <\/h3><\/span>\n\t\t\t\t\t\t\t<span class='e-n-accordion-item-title-icon'>\n\t\t\t<span class='e-opened' ><i aria-hidden=\"true\" class=\"fas fa-minus\"><\/i><\/span>\n\t\t\t<span class='e-closed'><i aria-hidden=\"true\" class=\"fas fa-plus\"><\/i><\/span>\n\t\t<\/span>\n\n\t\t\t\t\t\t<\/summary>\n\t\t\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1512\" class=\"elementor-element elementor-element-56ac1bfe e-con-full e-flex e-con e-child\" data-id=\"56ac1bfe\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1512\" class=\"elementor-element elementor-element-1ced6e37 e-flex e-con-boxed e-con e-child\" data-id=\"1ced6e37\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t\t\t<div class=\"elementor-element elementor-element-57d52cdc elementor-widget elementor-widget-text-editor\" data-id=\"57d52cdc\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t\t\t\t\t\t<p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">A pan-European cloud-based design infrastructure coordinated by imec, giving SMEs, startups and fabless firms access to commercial electronic design automation tools, IP libraries, cloud design environments and a route to European pilot lines and manufacturing. First companies are being onboarded across 2026 to 2028.<\/span><\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/details>\n\t\t\t\t\t\t<details id=\"e-n-accordion-item-1513\" class=\"e-n-accordion-item\" >\n\t\t\t\t<summary class=\"e-n-accordion-item-title\" data-accordion-index=\"4\" tabindex=\"-1\" aria-expanded=\"false\" aria-controls=\"e-n-accordion-item-1513\" >\n\t\t\t\t\t<span class='e-n-accordion-item-title-header'><h3 class=\"e-n-accordion-item-title-text\"> What are Chips Competence Centres? <\/h3><\/span>\n\t\t\t\t\t\t\t<span class='e-n-accordion-item-title-icon'>\n\t\t\t<span class='e-opened' ><i aria-hidden=\"true\" class=\"fas fa-minus\"><\/i><\/span>\n\t\t\t<span class='e-closed'><i aria-hidden=\"true\" class=\"fas fa-plus\"><\/i><\/span>\n\t\t<\/span>\n\n\t\t\t\t\t\t<\/summary>\n\t\t\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1513\" class=\"elementor-element elementor-element-1db7a24b e-flex e-con-boxed e-con e-child\" data-id=\"1db7a24b\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1513\" class=\"elementor-element elementor-element-1c8c4f0b e-con-full e-flex e-con e-child\" data-id=\"1c8c4f0b\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t<div class=\"elementor-element elementor-element-2d0b2fb2 elementor-widget elementor-widget-text-editor\" data-id=\"2d0b2fb2\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t\t\t\t\t\t<p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">A network of thirty national centres across all twenty-seven EU Member States plus Norway, established as of February 2026. They provide access to pilot lines and the design platform, technical and design support, training, and help finding investors, and they operate as the designated first contact point for SMEs and startups on an open, non-discriminatory basis.<\/span><\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/details>\n\t\t\t\t\t\t<details id=\"e-n-accordion-item-1514\" class=\"e-n-accordion-item\" >\n\t\t\t\t<summary class=\"e-n-accordion-item-title\" data-accordion-index=\"5\" tabindex=\"-1\" aria-expanded=\"false\" aria-controls=\"e-n-accordion-item-1514\" >\n\t\t\t\t\t<span class='e-n-accordion-item-title-header'><h3 class=\"e-n-accordion-item-title-text\"> Do Chips JU projects need national co-funding? <\/h3><\/span>\n\t\t\t\t\t\t\t<span class='e-n-accordion-item-title-icon'>\n\t\t\t<span class='e-opened' ><i aria-hidden=\"true\" class=\"fas fa-minus\"><\/i><\/span>\n\t\t\t<span class='e-closed'><i aria-hidden=\"true\" class=\"fas fa-plus\"><\/i><\/span>\n\t\t<\/span>\n\n\t\t\t\t\t\t<\/summary>\n\t\t\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1514\" class=\"elementor-element elementor-element-d0998b5 e-flex e-con-boxed e-con e-child\" data-id=\"d0998b5\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1514\" class=\"elementor-element elementor-element-62807bb4 e-con-full e-flex e-con e-child\" data-id=\"62807bb4\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t<div class=\"elementor-element elementor-element-74fbeaa1 elementor-widget elementor-widget-text-editor\" data-id=\"74fbeaa1\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t\t\t\t\t\t<p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Most calls are co-funded, with the Joint Undertaking contributing up to 50% and the participating state contributing the rest. National eligibility rules, funding rates and deadlines apply alongside the JU&#8217;s, so the national funding body must be engaged before a proposal is written rather than afterwards.<\/span><\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/details>\n\t\t\t\t\t\t<details id=\"e-n-accordion-item-1515\" class=\"e-n-accordion-item\" >\n\t\t\t\t<summary class=\"e-n-accordion-item-title\" data-accordion-index=\"6\" tabindex=\"-1\" aria-expanded=\"false\" aria-controls=\"e-n-accordion-item-1515\" >\n\t\t\t\t\t<span class='e-n-accordion-item-title-header'><h3 class=\"e-n-accordion-item-title-text\"> Can a software or AI company apply to the Chips JU? <\/h3><\/span>\n\t\t\t\t\t\t\t<span class='e-n-accordion-item-title-icon'>\n\t\t\t<span class='e-opened' ><i aria-hidden=\"true\" class=\"fas fa-minus\"><\/i><\/span>\n\t\t\t<span class='e-closed'><i aria-hidden=\"true\" class=\"fas fa-plus\"><\/i><\/span>\n\t\t<\/span>\n\n\t\t\t\t\t\t<\/summary>\n\t\t\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1515\" class=\"elementor-element elementor-element-9a2609 e-flex e-con-boxed e-con e-child\" data-id=\"9a2609\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1515\" class=\"elementor-element elementor-element-57450254 e-con-full e-flex e-con e-child\" data-id=\"57450254\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t<div class=\"elementor-element elementor-element-da12e40 elementor-widget elementor-widget-text-editor\" data-id=\"da12e40\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t\t\t\t\t\t<p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Often yes. The programme covers design capability, edge computing and the hardware-software boundary, not only fabrication. Companies working on model efficiency, inference at the edge, accelerator architectures or hardware-aware optimisation are frequently better matched here than in a Horizon Europe digital cluster topic, and competition is less intense.<\/span><\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/details>\n\t\t\t\t\t\t<details id=\"e-n-accordion-item-1516\" class=\"e-n-accordion-item\" >\n\t\t\t\t<summary class=\"e-n-accordion-item-title\" data-accordion-index=\"7\" tabindex=\"-1\" aria-expanded=\"false\" aria-controls=\"e-n-accordion-item-1516\" >\n\t\t\t\t\t<span class='e-n-accordion-item-title-header'><h3 class=\"e-n-accordion-item-title-text\"> What is the difference between RIA and IA topics in the Chips JU? <\/h3><\/span>\n\t\t\t\t\t\t\t<span class='e-n-accordion-item-title-icon'>\n\t\t\t<span class='e-opened' ><i aria-hidden=\"true\" class=\"fas fa-minus\"><\/i><\/span>\n\t\t\t<span class='e-closed'><i aria-hidden=\"true\" class=\"fas fa-plus\"><\/i><\/span>\n\t\t<\/span>\n\n\t\t\t\t\t\t<\/summary>\n\t\t\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1516\" class=\"elementor-element elementor-element-370b373f e-flex e-con-boxed e-con e-child\" data-id=\"370b373f\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1516\" class=\"elementor-element elementor-element-52bdd3ac e-con-full e-flex e-con e-child\" data-id=\"52bdd3ac\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t<div class=\"elementor-element elementor-element-2f6ba692 elementor-widget elementor-widget-text-editor\" data-id=\"2f6ba692\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t\t\t\t\t\t<p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Research and Innovation Actions fund lower-maturity work, including bottom-up topics around TRL 3\u20134 aimed at establishing new knowledge and technical feasibility. Innovation Actions fund market-oriented development around TRL 5\u20138, with an industrial deployment plan for Europe.<\/span><\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/details>\n\t\t\t\t\t\t<details id=\"e-n-accordion-item-1517\" class=\"e-n-accordion-item\" >\n\t\t\t\t<summary class=\"e-n-accordion-item-title\" data-accordion-index=\"8\" tabindex=\"-1\" aria-expanded=\"false\" aria-controls=\"e-n-accordion-item-1517\" >\n\t\t\t\t\t<span class='e-n-accordion-item-title-header'><h3 class=\"e-n-accordion-item-title-text\"> How do consortia form in the Chips JU ecosystem? <\/h3><\/span>\n\t\t\t\t\t\t\t<span class='e-n-accordion-item-title-icon'>\n\t\t\t<span class='e-opened' ><i aria-hidden=\"true\" class=\"fas fa-minus\"><\/i><\/span>\n\t\t\t<span class='e-closed'><i aria-hidden=\"true\" class=\"fas fa-plus\"><\/i><\/span>\n\t\t<\/span>\n\n\t\t\t\t\t\t<\/summary>\n\t\t\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1517\" class=\"elementor-element elementor-element-37d13e33 e-flex e-con-boxed e-con e-child\" data-id=\"37d13e33\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t<div role=\"region\" aria-labelledby=\"e-n-accordion-item-1517\" class=\"elementor-element elementor-element-6a5469d4 e-con-full e-flex e-con e-child\" data-id=\"6a5469d4\" data-element_type=\"container\" data-e-type=\"container\">\n\t\t\t\t<div class=\"elementor-element elementor-element-57b79b3f elementor-widget elementor-widget-text-editor\" data-id=\"57b79b3f\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t\t\t\t\t\t<p><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\">Largely through the three industry associations that partner in the Joint Undertaking &#8211; AENEAS, EPoSS and INSIDE &#8211; and their working groups, rather than through open partner-search platforms. For a startup, engaging with the relevant association is the primary access route to consortia that will submit.<\/span><\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/details>\n\t\t\t\t\t<\/div>\n\t\t\t\t\t<script type=\"application\/ld+json\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@type\":\"FAQPage\",\"mainEntity\":[{\"@type\":\"Question\",\"name\":\"What is the Chips Joint Undertaking?\",\"acceptedAnswer\":{\"@type\":\"Answer\",\"text\":\"A European partnership that funds the semiconductor value chain from research through to manufacturing, drawing on both Horizon Europe and Digital Europe. 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Companies working on model efficiency, inference at the edge, accelerator architectures or hardware-aware optimisation are frequently better matched here than in a Horizon Europe digital cluster topic, and competition is less intense.\"}},{\"@type\":\"Question\",\"name\":\"What is the difference between RIA and IA topics in the Chips JU?\",\"acceptedAnswer\":{\"@type\":\"Answer\",\"text\":\"Research and Innovation Actions fund lower-maturity work, including bottom-up topics around TRL 3\\u20134 aimed at establishing new knowledge and technical feasibility. Innovation Actions fund market-oriented development around TRL 5\\u20138, with an industrial deployment plan for Europe.\"}},{\"@type\":\"Question\",\"name\":\"How do consortia form in the Chips JU ecosystem?\",\"acceptedAnswer\":{\"@type\":\"Answer\",\"text\":\"Largely through the three industry associations that partner in the Joint Undertaking &#8211; AENEAS, EPoSS and INSIDE &#8211; and their working groups, rather than through open partner-search platforms. For a startup, engaging with the relevant association is the primary access route to consortia that will submit.\"}}]}<\/script>\n\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-497d78b elementor-widget elementor-widget-text-editor\" data-id=\"497d78b\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t\t\t\t\t\t<h2 class=\"western\"><span style=\"color: #1f3864;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: medium;\"><b>\u00a0 Sources<\/b><\/span><\/span><\/span><\/h2><ul><li><a href=\"https:\/\/www.chips-ju.europa.eu\/Open-and-Upcoming-Calls\/\"><span style=\"color: #0563c1;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><u>Chips Joint Undertaking &#8211; open and upcoming calls<\/u><\/span><\/span><\/span><\/a><\/li><li><a href=\"https:\/\/aar2024.chips-ju.europa.eu\/annual-report\/competence-centres\"><span style=\"color: #0563c1;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><u>Chips Joint Undertaking &#8211; Competence Centres<\/u><\/span><\/span><\/span><\/a><\/li><li><a href=\"https:\/\/aeneas-office.org\/funding\/chips-ju\/\"><span style=\"color: #0563c1;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><u>AENEAS &#8211; Chips JU, design platform and competence centre network<\/u><\/span><\/span><\/span><\/a><\/li><li><a href=\"https:\/\/digital-strategy.ec.europa.eu\/en\/news\/eu-invests-eu325-million-support-europes-semiconductor-innovation-ecosystem\"><span style=\"color: #0563c1;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><u>European Commission &#8211; EU invests \u20ac325 million to support Europe&#8217;s semiconductor innovation ecosystem<\/u><\/span><\/span><\/span><\/a><\/li><li><a href=\"https:\/\/digital-strategy.ec.europa.eu\/en\/policies\/eu-tech-sovereignty\"><span style=\"color: #0563c1;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><u>European Commission &#8211; Strengthening Europe&#8217;s tech sovereignty<\/u><\/span><\/span><\/span><\/a><\/li><li><a href=\"https:\/\/ec.europa.eu\/info\/funding-tenders\/opportunities\/portal\/screen\/programmes\/horizon\"><span style=\"color: #0563c1;\"><span style=\"font-family: Arial, serif;\"><span style=\"font-size: small;\"><u>EU Funding &amp; Tenders Portal &#8211; Horizon Europe programme page<\/u><\/span><\/span><\/span><\/a><\/li><\/ul>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t","protected":false},"excerpt":{"rendered":"<p>Munich, 19 October 2026 \u00b7 Nexuswelt Group Most startups assume the Chips Joint Undertaking is about fabrication plants and therefore not for them. That assumption is wrong twice over: it misses the collaborative research calls, and &#8211; more importantly &#8211; it misses the fact that much of what the Chips JU funds is infrastructure you [&hellip;]<\/p>\n","protected":false},"author":4,"featured_media":49085,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"googlesitekit_rrm_CAowqvfKDA:productID":"","footnotes":""},"categories":[829,82],"tags":[618,673,276,909,167,908,833],"class_list":["post-49082","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-chips-ju-semiconductors","category-eu-funding-insights-horizon-europe-news-project-blog","tag-chips-ju","tag-deep-tech","tag-digital-europe","tag-eu-chips-act","tag-horizon-europe","tag-semiconductors","tag-startups"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.3 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>EU Funding for Semiconductor Startups: Chips JU | Nexuswelt<\/title>\n<meta name=\"description\" content=\"How semiconductor startups can use Chips JU: design platform, competence centres, pilot lines, R&amp;I calls and national co-funding rules.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/nexuswelt.com\/de\/eu-funding-semiconductor-startups-chips-ju\/\" \/>\n<meta property=\"og:locale\" content=\"de_DE\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"EU Funding for Semiconductor Startups: Chips JU | Nexuswelt\" \/>\n<meta property=\"og:description\" content=\"How semiconductor startups can use Chips JU: design platform, competence centres, pilot lines, R&amp;I calls and national co-funding rules.\" \/>\n<meta property=\"og:url\" content=\"https:\/\/nexuswelt.com\/de\/eu-funding-semiconductor-startups-chips-ju\/\" \/>\n<meta property=\"og:site_name\" content=\"Nexuswelt\" \/>\n<meta property=\"article:published_time\" content=\"2026-10-19T04:00:13+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/nexuswelt.com\/wp-content\/uploads\/2026\/10\/eu-funding-semiconductor-startups-chips-ju-banner.jpg\" \/>\n\t<meta property=\"og:image:width\" content=\"1672\" \/>\n\t<meta property=\"og:image:height\" content=\"941\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/jpeg\" \/>\n<meta name=\"author\" content=\"Anna Lackner\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Verfasst von\" \/>\n\t<meta name=\"twitter:data1\" content=\"Anna Lackner\" \/>\n\t<meta name=\"twitter:label2\" content=\"Gesch\u00e4tzte Lesezeit\" \/>\n\t<meta name=\"twitter:data2\" content=\"11\u00a0Minuten\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":[\"Article\",\"BlogPosting\"],\"@id\":\"https:\\\/\\\/nexuswelt.com\\\/de\\\/eu-funding-semiconductor-startups-chips-ju\\\/#article\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/nexuswelt.com\\\/de\\\/eu-funding-semiconductor-startups-chips-ju\\\/\"},\"author\":{\"name\":\"Anna Lackner\",\"@id\":\"https:\\\/\\\/nexuswelt.com\\\/de\\\/#\\\/schema\\\/person\\\/22d9d5f8d2cdc386fe99895be67bf4eb\"},\"headline\":\"EU Funding for Semiconductor Startups: Chips JU Explained\",\"datePublished\":\"2026-10-19T04:00:13+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\\\/\\\/nexuswelt.com\\\/de\\\/eu-funding-semiconductor-startups-chips-ju\\\/\"},\"wordCount\":2331,\"commentCount\":0,\"publisher\":{\"@id\":\"https:\\\/\\\/nexuswelt.com\\\/de\\\/#organization\"},\"image\":{\"@id\":\"https:\\\/\\\/nexuswelt.com\\\/de\\\/eu-funding-semiconductor-startups-chips-ju\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/nexuswelt.com\\\/wp-content\\\/uploads\\\/2026\\\/10\\\/eu-funding-semiconductor-startups-chips-ju-banner.jpg\",\"keywords\":[\"Chips JU\",\"Deep Tech\",\"Digital Europe\",\"EU Chips Act\",\"Horizon Europe\",\"Semiconductors\",\"Startups\"],\"articleSection\":[\"Chips JU &amp; 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